H.265/HEVC Decoder on ARM
H.265 or High Efficiency Video Coding (HEVC) is the most contemporary video compression standard. It is a successor to H.264 standard and expected to provide double the data compression ratio compared to H.264 at the same level of video quality.
PathPartner offers ready to integrate HEVC Decoder for single and multi-core ARM platforms. It is robust, low latency and highly optimized for performance and memory. The HEVC Decoder has been designed to address specific requirements for multiple application, including support for error concealment and low-latency decoding. HEVC Decoder will be made available on other platforms soon.
- Compliant with the standard ISO/IEC 23008-2 (MPEG-H Part 2) or ITU-T H.265
- Supports Main profile
- Supports upto Level 5, Scalable up to UHD (3840×2160) @ 24 fps
Supports robust error concealment
Easy to integrate APIs
Refer to the datasheets for detailed features and performance.
OS: Android, Embedded Linux, Windows Phone, iOS.
Hardware: ARM Cortex A8, Cortex A9, Cortex A15.
GPU based H.265/HEVC Decoder
PathPartner offers ready to integrate GPU based HEVC Decoder solution on multiple SoCs equipped with multi-core CPUs and GPGPUs. In our GPU based HEVC decoder solution, modules with massive parallel data computations like Motion compensation, Inverse transform, Inverse Quantization, and De-blocking are offloaded to GPGPU using OpenCL framework and achieved real-time performance with reduced power consumption and significant reduction in CPU load. Our ARM CPU + GPU based HEVC decoder solution can be used on SoCs that have asynchronous CPUs and GPU, and can run on any SoC with GPU having OpenCL support.
- Compliant with ISO/IEC 23008-2 (MPEG-H Part 2) or ITU-T H.265 Main profile
- Supports up to Level 5, Scalable up to UHD (3840×2160) @ 30 fps
- Supports robust error concealment
- Solution also makes use of GPUs for error concealment
- Available as OpenMAX and GStreamer plugin
OS: Android, Embedded Linux
Hardware: ARM Mali GPU, Imagination PowerVR Series 6 (Rogue) GPU, AMD Radeon GPU based SoCs.
H.265/HEVC decoder on Zynq
PathPartner has implemented HEVC Decoder on Zynq platform. This is done by utilizing Zynq architecture wherein dual-core ARM Cortex-A9 based processing system and programmable logic (Xilinx Artix 7) integrated into a single device. The parsing module of the HEVC Decoder is implemented on the Processing Sub-system of Zynq and computationally intensive blocks are implemented on the Programmable Logic.
- Compliant with the standard ISO/IEC 23008-2(MPEG-H Part 2) or ITU-T H.265
- Supports Main profile
- Supports upto Level 5, Scalable up to UHD (3840×2160) @ 30 fps
- Supports output in YUV 4:2:0 format
- Easy to integrate APIs
OS: Linux kernel version 3.3.0
Hardware: Xilinx Zynq-7000 All Programmable SoC ZC706 Evaluation Kit.