Getting Started with HLS on Altera

Date: June 13, 2018

This blog explains the steps to get started with using HLS tool on Altera. It does not deal with HLS basics, coding, pragmas, compiler directives and optimization techniques. Intel documents on these topics are well written and sufficient to understand details on them.

All of the steps listed here are derived from official Altera HLS user guide which can be referred for any clarifications. [https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/hls/ug-hls- getting-started.pdf]

There are lot more options which could be explored which are not dealt in this document. Details of the same can be found at below link. [https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/hls/ug-hls.pdf]

Step 1 : Install Quartus Prime Pro v17.1 for Arria 10 devices

It comes bundled with ModelSim too. The document states that Visual Studio 2010 be installed and higher versions may not be supported.

Step 2 : Open Visual Studio 2010 command prompt

We could use regular command prompt as well but it needs environment and paths set to MSVC libraries and headers which is used for C compilation. Since Visual Studio command prompt is inbuilt with these, it is preferred.

Getting Started with HLS on Altera

Step 3 : Initialize environment for Altera HLS

The environment is set for the instance of command window only. So, we need to set it every time new window is created. Go to hls folder and run init_hls.bat

> init_hls.bat

Step 4 : Set up the project folder

  • Copy a build.bat from any of the example projects and change source file names
  • Copy your source files into this folder
  • Copy the input files necessary if any

Step 5 : Compile the C code

Compile the C code to ensure software C version is running properly. It compiles the code and generates an executable. It throws compilation errors if it encounters issues. Resolve and fix them. This is the software debug step to clean up the C code.

> build.bat test-x86-64

Step 6 : Run the software executable

Run the executable generated to get the output file dumped. Verify if it is proper and as expected. In our example it has generated frame_rng_median.bur

Step 7 : Compile the C code for FPGA

Compile the C code for FPGA using HLS. Resolve errors faced if any. You can as well use the actual i++ command displayed while running. Running by i++ allows us to provide additional options as mentioned in Altera user guide. We will explore some of them later in this document.

> build.bat test-fpga

Step 8 : Explore the output of compilation

The compilation for FPGA gives out test-fpga.prj folder. This contains

  • RTL equivalent sources
  • Dependent HW sources
  • Quartus project file
  • Reports on resource and performance estimates

The Quartus project file thus generated could be opened in Quartus Prime Pro tool. This would be as good as any other RTL project. It can be compiled, analyzed, placed and routed.

The reports generated could be found in test-fpga.prj/reports

Step 9 : Open the quartus_compile project in Quartus Prime Pro tool

Once the project is open we can set the part number and run compilation. Upon completion of compilation, the report is updated with Quartus fir numbers which are more accurate than the HLS estimates reported previously.

Step 10 : View the reports generated in browser

The report can be viewed in browser by opening the html file present in reports folder of project.

Step 11 : Run the FPGA compilation generated executable

Run the executable generated to get an output similar to the one generated by software run. It may take a long time as it has to run hardware simulation along with co simulation to dump the output. Once run, the report file will be updated with latency numbers for the IP. It also generates the output file (if any) just like the software executed one.

Step 12 [Optional] : Generate and view simulation waveform

For this step we have to use the inbuilt i++ command. Below is the command which dumps out waveform with all signals included for the input provided.

> i++ -march=Arria10 -ghdl median_tb.cpp median.cpp

When simulation is completed it creates vsim.wlf file inside the a.prj/verification directory. This waveform can be viewed in Modelsim by following below steps:

  • Open ModelSim tool
  • In the console below, type following commands
    • > cd <project_folder>/a.prj/verification
    • > vsim -view vsim.wlf

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